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Achieving Ultra-Dense Superconducting Circuits: Pushing Integration Limits with New Fabrication Techniques

Published on:

4 April 2023

Primary Category:

Applied Physics

Paper Authors:

Liliang Ying,

Xue Zhang,

Guixiang He,

Weifeng Shi,

Hui Xie,

Linxian Ma,

Hui Zhang,

Jie Ren,

Wei Peng,

Zhen Wang

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Key Details

Developed a fabrication process with 7 Nb layers and 1 Mo resistor layer, targeting 15 kA/cm2 junctions

Used a thin SiO2 protective layer and optimized etching to improve junction reproducibility

Investigated the relationship between oxidation conditions and critical current density

Designed process control monitors to provide feedback and optimize fabrication

Demonstrated small-scale test circuits with high operating margins

AI generated summary

Achieving Ultra-Dense Superconducting Circuits: Pushing Integration Limits with New Fabrication Techniques

This paper reports on a new fabrication process that enables higher integration densities for superconducting electronics. By optimizing deposition, patterning, and etching steps, the authors achieved Josephson junctions with a 15 kA/cm2 critical current density and minimum feature sizes down to 0.5 μm. Small-scale test circuits demonstrated the viability of the process. The techniques presented will facilitate continued scaling of superconducting digital circuits.

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