9 November 2023
The Digital Annealer is hardware designed to optimize quadratic binary models
Number partitioning and graph partitioning problems were encoded for the annealer
It solved large number partitioning cases optimally in under 30 seconds
The annealer partitioned power grids better than simulated annealing
Solving optimization problems with Fujitsu's Digital Annealer
This paper explores using Fujitsu's Digital Annealer, an application-specific hardware, to efficiently solve combinatorial optimization problems. The authors formulate number partitioning and graph partitioning into quadratic binary optimization models to optimize on the annealer. Results show it found optimal solutions for large problem sizes quickly, and partitioned power grids better than simulated annealing.
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